Juan 14/09/2020: Rules.LXpgi2004.mk , add support of arch CPU type = TP & MANAGEDO2/OPENACCO2 optlevel <=> without "-g"

Juan 14/09/2020: Rules.LXnvhpc2005.mk , add support of arch CPU type = TP & MANAGEDO2/OPENACCO2 optlevel <=> without "-g"

Juan 14/09/2020: Rules.LXifort.mk , for reproductibility add MNH_BITREP compilation + -fp-model consistent

Juan 14/09/2020 : tridiag_wind.f90 , OpenACC optimisation -> DO CONCURRENT +  loop gang vector collapse

Juan 14/09/2020 : tridiag_thermo.f90 , OpenACC optimisation -> DO CONCURRENT +  loop gang vector collapse

Juan 14/09/2020 : rain_ice_slow.f90 , OpenACC optimisation -> DO CONCURRENT for BR_POW parallelization

Juan 14/09/2020 : rain_ice_nucleation.f90 , OpenACC optimisation -> DO CONCURRENT for BR_POW parallelization

Juan 14/09/2020 : MNH/rain_ice_fast_rg.f90 , OpenACC optimisation -> DO CONCURRENT for BR_POW parallelization

Juan 26/08/2020:rain_ice_fast_rs.f90, managed DO CONNCURRENT LOCAL , not supported on ifort with ifdef MNH_OPENACC && !_FAKEOPENACC

Juan 12/08/2020:rain_ice_fast_rg/s.f90,Bypass PGI/NVHPC OPENACC BUG data partially present => enter data in ini_rain_ce & DO CONCURRENT

Juan 12/08/2020:ini_rain_ice.f90, Openacc PB, data partially present => add enter data on XGAMINC* , XKER_SDRYG

Juan 11/08/2020: rain_ice_fast_rg/s.f90 , Bypass PGI/NVHPC OPENACC BUG, error 700: Illegal address during kernel execution => DO CONCURRENT

Juan 07/08/2020:advection_metsv.f90, PGI/NVHPC BUG , SEGFAULt , replace array syntaxe -> DO CONCURRENT

Juan 05/08/2020:mode_scatter.f90, For reduction of MPI_BUFFER_SIZE , in SCATTERXY_X3 replace MPI_BSEND -> MPI_ISEND